Table of Contents

• Session: Processor and Integrated Circuit Design + Low Power Computing + Testing
• 1) Allocation of NBTI Aging Sensors for Circuit Failure
• 2) Implementation of a Fast Fourier Transform Processor in NULL Convention
• 3) Network-Based System for Face Recognition on Mobile Wireless Devices
• 4) A Fault Injection Environment for the Evaluation of a Soft Error Detection Technique based on Time Redundancy
• 5) A Comparative Analysis of Parallel Prefix Adders
• 6) A Short Survey on User-aware Power Management
• Session: Performance Issues + Hpc And Multi-Processor Systems + Fpga + File Servers
• 1) Performance Tradeoff Spectrum of Integer and Floating Point Applications Kernels on Various GPUs
• 2) Performance Measures of an Implementation of a Parallel Compiler
• 3) SDD: Selective De-Duplication with Index by File Size for Primary File Servers
• Komoda
• 4) Iterative Synthesis Techniques for Multiple-Valued Logic Functions -- A Review and Comparison
• 5) FPGA-based Hexapod Robot Spider
• 6) 3D Lattice Monte Carlo Simulations on FPGAs
• 7) Redundancy + Reconfigurability = Recoverability

About the Author

Hamid R. Arabnia is Professor, Computer Science; Editor-in-Chief, The Journal of Supercomputing (Springer); Elected Fellow, Int'l Society of Intelligent Biological Medicine (ISIBM); The University of Georgia, Department of Computer Science.