Table of Contents

Chapter 1 - Classic Machines: Technology, Implementation, and Economics Chapter 2 - Methods Chapter 3 - Instruction Sets Chapter 4 - Instruction Level Parallelism (ILP) Chapter 5 - Dataflow and Multithreading Chapter 6 - Memory Systems Chapter 7 - I/O: Storage Systems, Networks, and Graphics Chapter 8 - Single-Instruction Multiple Data (SIMD) Parallelism Chapter 9 - Multiprocessors and Multicomputers Chapter 10 - Recent Implementations and Future Prospects

Promotional Information

* Includes more than 50 influential papers spanning four decades of computer architecture research and development
* Selected, edited, and introduced by three eminent researchers and educators in the field.
* Demonstrates the value of primary sources by showing how forgotten design ideas of the past are often rediscovered when new needs or constraints emerge.
* Accompanied by an annually updated companion Web site with links and references to recently published papers, providing a forum for the editors to comment on how recent work continues or breaks with previous work in the field.

About the Author

Mark D. Hill is Professor and Romnes Fellow in the Computer Sciences and Electrical and Computer Engineering departments at the University of Wisconsin-Madison. His research targets the memory systems of shared-memory multiprocessors and high-performance uniprocessors. Much of his recent work was part of the Wisconsin Wind Tunnel project, which examined supporting multiple parallel programming models on hardware ranging from tightly-coupled multiprocessors to clusters of workstations. Norman P. Jouppi is Consulting Engineer at Compaq Computer Corporation’s Western Research Laboratory (WRL). Formerly a consulting associate professor in the Department of Electrical Engineering at Stanford University, he has been a key contributor to the architecture and implementation of advanced graphics accelerators (including Neon), the MultiTitan and BIPS microprocessors at WRL, and the MIPS Stanford microprocessor. Gurindar S. Sohi, a Professor in the Computer Sciences and Electrical and Computer Engineering departments of the University of Wisconsin-Madison, was awarded the 1999 ACM SIGARCH Maurice Wilkes award for contributions in the areas of high issue rate processors and instruction level parallelism. His research has focused on architectural and microarchitectural techniques for high-performance microprocessors.